Method for depositing amorphous silicon thin films onto...

Coating processes – Direct application of electrical – magnetic – wave – or... – Plasma

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C427S535000, C427S255180, C427S255280, C427S255700, C427S573000

Reexamination Certificate

active

06444277

ABSTRACT:

This invention relates to the deposition of amorphous silicon thin films onto large area glass substrates. More particularly, this invention relates to the deposition of active amorphous silicon thin films by chemical vapor deposition.
BACKGROUND OF THE INVENTION
In the manufacture of liquid crystal cells, two glass plates are joined together with a layer of a liquid crystal material sandwiched between them. The glass substrates have conductive films thereon (at least one must be transparent, such as an ITO film) that can be connected to a source of power to change the orientation of the liquid crystal material. Various areas of the liquid crystal cell can be accessed by proper patterning of the conductive films. More recently, thin film transistors have been used to separately address areas of the liquid crystal cell at fast rates. Such liquid crystal cells are useful for active matrix displays such as TV and computer monitors.
As the requirements for resolution of liquid crystal monitors have increased, it has become desirable to separately address a plurality of areas of the liquid crystal cell, called pixels. Since about one million pixels are present in modern displays, at least the same number of transistors must be formed on the glass plates so that each pixel can be separately addressed.
Different types of thin film transistors are in current use, but most require deposition of a gate dielectric layer over a patterned gate metal with an amorphous silicon layer thereover. Metal contacts are deposited over the amorphous silicon film, which can have a thin layer of dopes silicon thereover to improve contact between the amorphous silicon and the overlying aluminum contacts.
It is known how to deposit amorphous silicon layers by glow discharge or a plasma type process. However, the rate of deposition of the films is quite low, e.g., about 100-300 angstroms per minute. Since films up to about 5000 angstroms in thickness are required for the manufacture of thin film transistors, comparatively lengthy deposition times are required, which increases the cost of making these films. It would be desirable to improve the deposition rate of CVD films to reduce costs.
Because of the large size and weight of glass substrates, which are for example about 350×450×1.1 mm in size, generally large reaction chambers are required for deposition of thin films thereon, and large and often slow transfer equipment is needed to transfer the substrates from one reaction chamber to another for sequential deposition of these thin films.
However, recently a vacuum system has been made of multiple chambers that can bring a plurality of substrates to vacuum, heat them batch wise to CVD temperatures, transfer them singly to specially designed CVD chambers that can deposit thin films of, inter alia, amorphous silicon, and transfer them back to a cooling chamber, all without leaving a vacuum environment. However, in order to maximize the efficiency of such a system, the idle time of the glass substrates within the system should be at a minimum.
Thus it would be highly desirable to improve the rate of deposition of amorphous silicon thin films to reduce the time needed to deposit films up to about 5000 angstroms in thickness.
SUMMARY OF THE INVENTION
We have found a method of depositing amorphous silicon thin films at a rate generally an order of magnitude higher than prior art processes. When this process is used in a vacuum system as described above, the time required for deposition of the thin films is greatly reduced, thereby improving the efficiency of the overall processing of large area glass substrates to form transistors thereon.
The improved deposition rate is achieved by optimizing processing parameters including gas flow rates, pressure, RF power, substrate temperature and the spacing between the gas manifold and the substrate.
Transistor characteristics of the high deposition rate amorphous silicon layer are improved by modifying the interface of the substrate layer, either by exposing the surface to a hydrogen plasma for a short period of time prior to depositing the high rate amorphous silicon of the invention, or by depositing a first layer of amorphous silicon using a slow deposition rate process prior to deposition of amorphous silicon in accordance with the high rate deposition process of the invention.


REFERENCES:
patent: 4436761 (1984-03-01), Hayashi et al.
patent: 4854263 (1989-08-01), Chang et al.
patent: 4892753 (1990-01-01), Wang et al.
patent: 4905066 (1990-02-01), Dohjo et al.
patent: 4951601 (1990-08-01), Maydan et al.
patent: 4987856 (1991-01-01), Hey et al.
patent: 5151255 (1992-09-01), Fukuda et al.
patent: 5214002 (1993-05-01), Hayashi et al.
patent: 5246744 (1993-09-01), Matsuda et al.
patent: 5258207 (1993-11-01), Iwamoto et al.
patent: 5264710 (1993-11-01), Yamagishi et al.
patent: 62-136870 (1987-06-01), None
patent: 63--197.329 (1988-08-01), None
patent: 63-215037 (1988-09-01), None
patent: 63-223178 (1988-09-01), None
patent: 2-494470 (1990-02-01), None
patent: 3-149525 (1991-06-01), None
patent: 4-342120 (1992-11-01), None
patent: 4-346419 (1992-12-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for depositing amorphous silicon thin films onto... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for depositing amorphous silicon thin films onto..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for depositing amorphous silicon thin films onto... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2836481

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.