Method for adhering and sealing a silicon chip in an integrated

Details Method for adhering and sealing a silicon chip in an integrated Method for adhering and sealing a silicon chip in an integrated

1997-12-19

2000-07-11

Picardat, Kevin M.

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Including adhesive bonding step

438106, 438119, H01L 2144, H01L 2148, H01L 2150

Patent

active

060872039

ABSTRACT:
A method and apparatus for producing an integrated circuit package (30) comprising a substrate (70) having an opening (86) and first and second surfaces (92, 94), a plurality of routing strips (82) being integral with the substrate (70) and extending into the opening (86), a plurality of pads (100) disposed on the first and second surfaces (92, 94) are electrically connected with at least one of the routing strips (82), wire bonding (80) electrically connecting at least one bonding pad (120) to at least one of the routing strips (82) and a silicon chip (50) attached to the printed circuit board (70) by an adhesive material (60) that provide a seal between silicon chip (50) and printed circuit board (70) is disclosed.

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