4. Semiconductor device manufacturing: process
  5. Packaging or treatment of packaged semiconductor
  6. Including adhesive bonding step

Min Yu Chan

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Chip size integrated circuit package

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Patent

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Encapsulate resin LOC package and method of fabrication

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame
Reexamination Certificate

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Flexible pin location integrated circuit package

Electricity: conductors and insulators – Boxes and housings – Hermetic sealed envelope type
Patent

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Integrated circuit package

Electricity: conductors and insulators – Boxes and housings – Hermetic sealed envelope type
Reexamination Certificate

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Integrated circuit package and flat plate molding process...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate

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Profile ID: LFUS-PAI-P-772109

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