Method and system for selectively masking test responses

Details Method and system for selectively masking test responses Method and system for selectively masking test responses

2008-05-20

2008-05-20

Ton, David (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S030000

Reexamination Certificate

active

10573083

ABSTRACT:
An apparatus for testing an integrated circuit is disclosed. The apparatus includes a compactor to compress test responses from a circuit under test that is part of an integrated circuit.

REFERENCES:
patent: 6311299 (2001-10-01), Bunker
patent: 6829740 (2004-12-01), Rajski et al.
patent: 7032148 (2006-04-01), Wang et al.
patent: 7095808 (2006-08-01), Shohara
patent: 7210083 (2007-04-01), Grinchuk et al.

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