Memory circuit

Details Memory circuit Memory circuit

1986-05-21

1988-07-12

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365240, G11C 700

Patent

active

047574739

ABSTRACT:
A dual-port memory circuit comprises a random port having a memory cell array randomly accessable and a serial port serially readable or writable from/to the memory cell array. In the memory circuit, two modes are provided to the serial port, and when a first mode is designated, the data are consecutively read or written a plurality of bits at a time, and when a second mode is designated, the data are consecutively read or written one bit at a time. High speed read/write operation is attained by designating the mode to allow parallel input/output. For an application which does not require high speed operation, the number of components to be externally added to the memory circuit can be reduced.

REFERENCES:
patent: 4402067 (1983-08-01), Moss et al.
patent: 4639890 (1987-01-01), Heilveil et al.
S. Ishimoto et al., "A 256K Dual Port Memory", 1985, IEEE International Solid-State Circuits Conference, Digest of Technical Papers, pp. 38-39.

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