Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-07-25
2006-07-25
Kebede, Brook (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257SE29270
Reexamination Certificate
active
07081391
ABSTRACT:
An integrated circuit device includes a gate electrode formed on an active region of an integrated circuit device and on a field isolation layer adjacent to the active region. A source region and a drain region are in the active region on alternate sides of the gate electrode. At least one buried insulation layer is beneath the drain region or the source region.
REFERENCES:
patent: 6482714 (2002-11-01), Hieda et al.
patent: 6600170 (2003-07-01), Xiang
patent: 6906384 (2005-06-01), Yamada et al.
patent: 2004/0038488 (2004-02-01), Mouli
patent: 02-135781 (1990-05-01), None
patent: 1019970048109 (1999-04-01), None
patent: 100272507 (2000-08-01), None
Notice to File a Response/Amendment to the Examination Report for Korean patent application no. 10-2003-*0041211 mailed on May 30, 2005.
Choi Si-young
Jung In-soo
Lee Byeong-chan
Lee Deok-hyung
Son Yong-hoon
Kebede Brook
Myers Bigel & Sibley Sajovec, PA
Samsung Electronics Co,. Ltd.
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