Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-02-22
2005-02-22
Eckert, George (Department: 2815)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S172000
Reexamination Certificate
active
06858502
ABSTRACT:
A method and a layered heterostructure for forming p-channel field effect transistors is described incorporating a plurality of semiconductor layers on a semiconductor substrate, a composite channel structure of a first epitaxial Ge layer and a second compressively strained SiGe layer having a higher barrier or a deeper confining quantum well and having extremely high hole mobility. The invention overcomes the problem of a limited hole mobility for a p-channel device with only a single compressively strained SiGe channel layer.
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Chu Jack Oon
Hammond Richard
Ismail Khalid EzzEldin
Koester Steven John
Mooney Patricia May
Eckert George
International Business Machines - Corporation
Richards N. Drew
Scully Scott Murphy & Presser
Trepp Robert M.
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