High-K metal gate structure fabrication method including...

Details High-K metal gate structure fabrication method including... High-K metal gate structure fabrication method including...

2011-08-30

2011-08-30

Lee, Hsien-ming (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S652000, C257SE21190, C257SE21409

Reexamination Certificate

active

08008145

ABSTRACT:
Provided is a method of fabricating a semiconductor device including a high-k metal gate structure. A substrate is provided including a dummy gate structure (e.g., a sacrificial polysilicon gate), a first and second hard mask layer overlie the dummy gate structure. In one embodiment, a strained region is formed on the substrate. After forming the strained region, the second hard mask layer may be removed. A source/drain region may be formed. An ILD layer is then formed on the substrate. A CMP process may planarize the ILD layer using the first hard mask layer as a stop layer. The CMP process may be continued to remove the first hard mask layer. The dummy gate structure is then removed and a metal gate provided.

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Chinese Office Action Dated Nov. 10, 2010, Chinese Application No. 200910163899.8; 5 Pages.

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