HDP-CVD deposition process for filling high aspect ratio gaps

Details HDP-CVD deposition process for filling high aspect ratio gaps HDP-CVD deposition process for filling high aspect ratio gaps

2005-07-05

2005-07-05

Guerrero, Maria F. (Department: 2822)

Semiconductor device manufacturing: process

Coating of substrate containing semiconductor region or of...

Insulative material deposited upon semiconductive substrate

C438S787000, C438S771000, C438S774000

Reexamination Certificate

active

06914016

ABSTRACT:
A method for forming a silicon oxide layer over a substrate disposed in a high density plasma substrate processing chamber. The method includes flowing a process gas that includes a silicon-containing source, an oxygen-containing source and a fluorine-containing source into the substrate processing chamber and forming a plasma from said process gas. The substrate is heated to a temperature above 450° C. during deposition of said silicon oxide layer and the deposited layer has a fluorine content of less than 1.0 atomic percent.

REFERENCES:
patent: 4667365 (1987-05-01), Martinek
patent: 4690746 (1987-09-01), McInerney et al.
patent: 4737379 (1988-04-01), Hudgens et al.
patent: 4835005 (1989-05-01), Hirooka et al.
patent: 4890575 (1990-01-01), Ito et al.
patent: 4894352 (1990-01-01), Lane et al.
patent: 5013691 (1991-05-01), Lory et al.
patent: 5571571 (1996-11-01), Musaka et al.
patent: 5571576 (1996-11-01), Qian et al.
patent: 5645645 (1997-07-01), Zhang et al.
patent: 5712185 (1998-01-01), Tsai et al.
patent: 5719085 (1998-02-01), Moon et al.
patent: 5728621 (1998-03-01), Zheng et al.
patent: 5750211 (1998-05-01), Weise et al.
patent: 5804259 (1998-09-01), Robles
patent: 5872058 (1999-02-01), Van Cleemput et al.
patent: 5910342 (1999-06-01), Hirooka et al.
patent: 5976327 (1999-11-01), Tanaka
patent: 5990013 (1999-11-01), Berenguer et al.
patent: 6013191 (2000-01-01), Nasser-Faili et al.
patent: 6013584 (2000-01-01), M'Saad
patent: 6020458 (2000-02-01), Lee et al.
patent: 6030881 (2000-02-01), Papasouliotis et al.
patent: 6039851 (2000-03-01), Iyer
patent: 6051321 (2000-04-01), Lee et al.
patent: 6090167 (2000-07-01), Bhan et al.
patent: 6149779 (2000-11-01), Van Cleemput
patent: 6150212 (2000-11-01), Divakaruni et al.
patent: 6150285 (2000-11-01), Besser et al.
patent: 6194038 (2001-02-01), Rossman
patent: 6197691 (2001-03-01), Lee
patent: 6217658 (2001-04-01), Orczyk et al.
patent: 6228751 (2001-05-01), Yamazaki et al.
patent: 6258407 (2001-07-01), Lee et al.
patent: 6268297 (2001-07-01), Nag et al.
patent: 6313010 (2001-11-01), Nag et al.
patent: 6335288 (2002-01-01), Kwan et al.
patent: 6355581 (2002-03-01), Vassiliev et al.
patent: 6395150 (2002-05-01), Van Cleemput et al.
patent: 6537832 (2003-03-01), Otsubo et al.
patent: 6559026 (2003-05-01), Rossman et al.
patent: 6740601 (2004-05-01), Tan et al.
patent: 0 822 585 (1998-02-01), None
patent: 2 267 291 (1993-12-01), None
patent: 2-58836 (1990-02-01), None
patent: 7-161703 (1995-06-01), None
V.Y. Vassiliev et al., “Trends in Void Free Pre-metal CVD Dielectrics,”Solid State Technology, pp. 129-136 (Mar. 2001).
L.Q. Qian et al., “High Density Plasma Deposition and Deep Submicron Gap Fill with Low Dielectric Constant SiOF Films,” Feb. 21-22, 1995DUMIC Conference, pp. 50-56.
T. Fukada et al., “Preparation of SiOF with Low Dielectric Constant by ECR Plasman CVD,” Feb. 21-22, 1995DUMIC Conference, pp. 43-49.
D. Yu et al., “Step Coverage Study of PETEOS Deposition for Intermetal Dielectric Applications,” Jun. 12-13, 1990VMIC Conference, pp. 166-172.
K. Musaka et al., “Single Step Gap Filling Technology for Subhalf Micron Metal Spacings on Plasma Enhanced TEOS/O2Chemical Vapor Deposition System,”Extended Abstracts of the 1993 International Conference on Solid State Devices and Materials, Makuhari, pp. 510-512 (1993).
T. Fukada et al., “Highly Reliable SiOF Film Formation Using High Density Plasma Containing Hydrogen,” Feb. 10-11, 1997DUMIC Conference, pp. 41-49.
G.Y. Lee et al., “A Low Redeposition Rate High Density Plasma CVD Process for High Aspect Ratio 175 mm Technology and Beyond,”Proceedings of the IEEE 1999 International Interconnect Technology Conference, pp. 152-154 (1999).
V.Y. Vassiliev et al., “Properties and Gap-Fill Capability of HDP-CVD Phosphosilicate Glass Films for Subquarter-Micrometer ULSI Device Technology,”Electrochemical and Solid-State Letters, vol. 3, No. 2, pp. 80-83 (2000).
Nalwa, H.S.,Handbook of Low and High Dielectric Constant Materials and Their Applications, vol. 1, p. 66 (1999).
Nguyen, s.v., “High-Density Plasma Chemical Vapor Deposition of Silicon-Based Dielectric Films for Integrated Circuits,”Journal of Research and Development, vol. 43, 1/2 (1999).

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