Flip chip package structure

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip

Reexamination Certificate

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Details

C257S737000

Reexamination Certificate

active

07019407

ABSTRACT:
A flip chip package structure comprising a chip, a substrate, at least a first bump and a plurality of second bumps is provided. The chip has a first bump-positioning region and the substrate has a second bump-positioning region. The substrate has at least a first hole and multiple second holes. The first hole and the second holes are located within the second bump-positioning region. The first hole has a depth greater than that of the second hole. The first bump is set up between the first bump-positioning region of the chip and the second bump-positioning region of the substrate. The first bump is bonded to the substrate through the first holes. The second bumps are set up between the first bump-positioning region of the chip and the second bump-positioning region of the substrate. The second bumps are bonded to the substrate through the second holes. The first bump has a volume greater than the volume of the second bump.

REFERENCES:
patent: 5352926 (1994-10-01), Andrews
patent: 6150724 (2000-11-01), Wenzel et al.
patent: 6586844 (2003-07-01), Chang
patent: 6768190 (2004-07-01), Yang et al.
patent: 6774498 (2004-08-01), Hsu et al.
patent: 6825568 (2004-11-01), Hung

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