Flash memory device including multi-buffer block

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

Reexamination Certificate

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Details

C365S189120, C365S185230, C365S221000

Reexamination Certificate

active

07489565

ABSTRACT:
A flash memory device includes a memory cell array and a multi-buffer block which temporarily stores program data that are to be stored in the memory cell array, wherein the multi-buffer block includes a plurality of buffer circuits which store at least 2-word data, respectively. Each of the buffer circuits includes a plurality of registers which store two corresponding data bits among the at least 2-word data, respectively and scan logics corresponding to the registers, respectively, which scan a number of program data of a first word data among the at least 2-word data during a first scan interval, and which scan a number of program data of a second word data among the at least 2-word data based on the number of the program data of the first word data during a second scan interval.

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patent: 1020060003258 (2006-01-01), None

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