Etch depth control for dual damascene fabrication process

Semiconductor device manufacturing: process – Chemical etching – Combined with coating step

Reexamination Certificate

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C438S714000, C257S758000, C257SE21249

Reexamination Certificate

active

07572734

ABSTRACT:
The etch depth during trench over via etch of a dual damascene structure in a dielectric film stack is controlled to be the same over the dense area and the open area of a substrate and solve micro-loading problems. The trench etch process is adapted to include a forward micro-loading etching process and a reverse micro-loading etching process using two etch chemistries together with the inclusion of a dopant material layer or an organic fill material layer during the deposition of the dielectric film stack. In one embodiment, etching of trenches over vias is switched from forward micro-loading to reverse micro-loading once etching of the dielectric film stack is reached at a predetermined location of a dopant material layer. In another embodiment, etching of an organic trench filling material layer is performed in a reverse micro-loading process followed by etching the dielectric film stack in a forward micro-loading process.

REFERENCES:
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patent: 6489248 (2002-12-01), Zhang et al.
patent: 6518192 (2003-02-01), Khan et al.
patent: 6939811 (2005-09-01), Kamp et al.
patent: 7279114 (2007-10-01), Hong
patent: 2002/0142613 (2002-10-01), Fu et al.

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