Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2008-12-29
2011-11-08
Landau, Matthew (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S770000, C257SE21550, C257SE21301
Reexamination Certificate
active
08053322
ABSTRACT:
A method of fabricating an integrated circuit (IC) and ICs therefrom including a plurality of Metal Oxide Semiconductor (MOS) transistors having reduced gate dielectric thinning and corner sharpening at the trench isolation/semiconductor edge for gate dielectric layers generally 500 to 5,000 Angstroms thick. The method includes providing a substrate having a silicon including surface. A plurality of dielectric filled trench isolation regions are formed in the substrate. The silicon including surface forms trench isolation active area edges along its periphery with the trench isolation regions. An epitaxial silicon comprising layer is deposited, wherein the epitaxial comprising silicon layer is formed over the silicon comprising surface. The epitaxial comprising silicon layer is oxidized to convert at least a portion into a thermally grown silicon oxide layer, wherein the thermally grown silicon oxide layer provides at least a portion of a gate dielectric layer for at least one of said plurality of MOS transistors. A patterned gate electrode layer is formed over the gate dielectric, wherein the patterned gate electrode layer extends over at least one of the trench isolation active area edges. Fabrication of the IC is then completed.
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Chatterjee Amitava
Drobny Vladimir F.
Steinmann Phillipp
Wise Rick
Brady III Wade J.
Crawford Latanya N
Franz Warren L.
Landau Matthew
Telecky , Jr. Frederick J.
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