Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-11-06
2009-06-09
Smith, Matthew (Department: 2823)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257SE21632
Reexamination Certificate
active
07544561
ABSTRACT:
A semiconductor structure includes a PMOS device and an NMOS device. The PMOS device includes a first gate dielectric on a semiconductor substrate, a first gate electrode on the first gate dielectric, and a first gate spacer along sidewalls of the first gate electrode and the first gate dielectric. The NMOS device includes a second gate dielectric on the semiconductor substrate, a second gate electrode on the second gate dielectric, a nitrided polysilicon re-oxidation layer having a vertical portion and a horizontal portion wherein the vertical portion is on sidewalls of the second gate electrode and the second gate dielectric and wherein the horizontal portion is on the semiconductor substrate, and a second gate spacer on sidewalls of the second gate electrode and the second gate dielectric, wherein the second gate spacer is on the horizontal portion of the nitrided polysilicon re-oxidation layer.
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Authors: Paul G. Y. Tsui, Hsing-Huang Tseng, Marius Orlowski, Shih-Wei Sun, P. J. Tobin, Kimberly Reid, and William J. Taylor Title: Suppression of MOSFET Reverse Short Channel Effect N20 Gate Poly Reoxidation Process Publisher: IEDM Tech. Digest, pp. 501-504 (1994).
S. Kusunoki, M. Inuishi, T. Yamaguchi, K. Tsukamoto, and Y. Akasaka “Hot-carrier-resistant structure by re-oxidized nitrided oxide sidewall for highly reliable and high performance LDD MOSFETS” IEEE IEDM, Technical Digest, vol. 91, 1991, pp. 649-652.
Chen Chi-Chun
Chen Shih-Chang
Lee Da-Yuan
Lin Wenli
Slater & Matsil L.L.P.
Smith Matthew
Swanson Walter H
Taiwan Semiconductor Manufacturing Company , Ltd.
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