Dielectric etch chamber with expanded process window

Details Dielectric etch chamber with expanded process window Dielectric etch chamber with expanded process window

2002-09-24

2004-09-28

Hassanzadeh, Parviz (Department: 1763)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C216S067000, C156S345470, C156S345290, C118S7230ER, C118S715000

Reexamination Certificate

active

06797639

ABSTRACT:

BACKGROUND OF THE DISCLOSURE
1. Field of the Invention
The present invention relates generally to a semiconductor wafer processing apparatus. More specifically, the invention relates to a dielectric etch processing chamber having improved thermal and by-product management capabilities, improved control of gaseous species residence time, and an expanded process window including high flow rates and low operating pressures.
2. Background of the Invention
One challenge facing all forms of semiconductor processing is the industry wide progression towards decreasing feature sizes resulting in rapidly shrinking critical dimensions. Current design rules have feature sizes of less than about 0.18 microns and feature sizes below about 0.1 microns are being developed.
Another challenge facing semiconductor processing is the trend towards smaller footprint devices. One approach to achieving a smaller device footprint is to build the device structure vertically and in some devices, fabricating portions of the device in the substrate itself.
These challenges generate a need for processing applications capable of fabricating high aspect ratio structures and structures with critical dimensions approaching the sub-0.1 micron range.
In view of these challenges, minimizing particulate contamination during the myriad processing sequences used to fabricate an electronic device is critical. Chamber components are selected and processes are performed in reduced atmospheres to assist in reducing and managing particles that may be present and/or generated in the processing environment. Of particular importance is the management of films that form within the process chamber during wafer processing.
Films deposited within the processing chamber are major contributors to the total particulate concentrations found within the process chamber. Films typically form on exposed chamber and process kit components during a wide variety of semiconductor processing applications.
During dielectric etch processes, for example, some of the material removed from the layer exposed to the etchant is exhausted from the processing chamber. However, some etch reaction by-products form deposits on exposed chamber surfaces and on surfaces of the etched structure.
The deposits on chamber surfaces increase in thickness as the process cycles are repeated and additional wafers are processed. As the deposit thickness increases, so too does the internal stresses associated with the deposit. Additional stresses are created in these deposits due to differences in thermal expansion rates between the deposit and the chamber surfaces. Conventional etch chambers lack appropriate thermal management techniques to reduce thermally induced stresses between accumulated deposits and chamber components. Eventually, the stresses can cause the deposits to crack, consequently releasing particles into the chamber environment. These film particles may impinge upon the wafer surface, typically creating a defect in the circuit structure on the wafer.
Control of deposit formation on the etch structure is also a critical process consideration. In high aspect ratio dielectric etch processes, for example, the formation of a thin sidewall layer or passivation layer is desired to help maintain sidewall profile control as the depth of the etched feature increases. As feature sizes decrease, however, sidewall profile control becomes increasingly more difficult and possibly unfeasible using conventional plasma etch chambers. Decreasing critical dimensions require increasingly refined control of an expanded range of etch process chemistry parameters not provided by conventional etch chambers.
Therefore, there is a need for a dielectric etch processing apparatus with the capability of providing expanded processing capabilities with improved process parameter control that enables advanced feature dielectric etch processes.
SUMMARY OF INVENTION
The disadvantages associated with the prior art etch chambers and the challenges posed by advanced dielectric etch processes are overcome by embodiments of the present invention of a thermally controlled plasma etch chamber having an expanded process window and improved by product management capabilities. The inventive process chamber is generally a capacitively coupled plasma source chamber and, more specifically, a capacitively coupled chamber operating in an RIE mode and MERIE mode.
An embodiment of an apparatus according to the present invention comprises a capacitively coupled reactor for plasma etch processing of substrates at subatmospheric pressures having a chamber body defining a processing volume, a lid provided upon the chamber body, the lid being a first electrode, a substrate support provided in the processing volume and comprising a second electrode, a radio frequency source coupled at least to one of the first and second electrodes, a process gas inlet configured to deliver process gas into the processing volume, and an evacuation pump system having pumping capacity of at least 1600 liters/minute. The greater pumping capacity controls residency time of the process gases so as to regulate the degree of dissociation into more reactive species, such as free fluorine.


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