Deposition of stable dielectric films

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate

Reexamination Certificate

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C438S787000, C438S789000, C438S763000

Reexamination Certificate

active

06511923

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to methods and apparatus for substrate processing. More particularly, the present invention relates to methods and apparatus for improved deposition of stable dielectric films.
One of the primary steps in the fabrication of modern semiconductor devices is the formation of a thin film on a semiconductor substrate by chemical reaction of gases. Such a deposition process is referred to as chemical vapor deposition (CVD). Conventional thermal CVD processes supply reactive gases to the substrate surface where heat-induced chemical reactions can take place to produce the desired film. Plasma enhanced CVD processes promote the excitation and/or dissociation of the reactant gases by the application of radio frequency (RF) energy to the reaction zone proximate the substrate surface thereby creating a plasma of highly reactive species. The high reactivity of the released species reduces the energy required for a chemical reaction to take place, and thus lowers the required temperature for such CVD processes.
In one design of plasma CVD chambers, a vacuum chamber is generally defined by a planar substrate support, acting as a cathode, along the bottom, a planar anode along the top, a relatively short sidewall extending upwardly from the bottom, and a dielectric dome connecting the sidewall with the top. Inductive coils are mounted about the dome and are connected to a source radio frequency (SRF) generator. The anode and the cathode are typically coupled to bias radio frequency (BRF) generators. Energy applied from the SRF generator to the inductive coils forms a plasma within the chamber. Such a chamber is referred to as a high density plasma CVD (HDP-CVD) chamber.
Halogen-doped silicon oxide layers, and fluorine-doped silicate glass (FSG) layers in particular, are becoming increasingly popular in a variety of applications due to the lower dielectric constants achievable for these films than for silicon oxide, which is the conventional dielectric material for inter-metal dielectric and trench isolation, as well as their excellent gap-fill properties. Other fluorine-doped dielectric materials such as fluorine-doped amorphous carbon have also been used.
The use of fluorine-doped dielectric layers poses several problems, particularly in multilayer processing. For instance, when used as an intermetal dielectric layer, the fluorine-doped film exhibits relatively poor adhesion with the metal layers. Presently used techniques tend to create unacceptable film adhesion for some applications when depositing fluorinated silicon glass (FSG) films integrated with other films such as Ti, TiN, W, Al, etc. The FSG film may have loosely bonded fluorine atoms that result in H
2
O, H, or OH absorption and subsequent undesirable H
2
O, H, or OH and hydrofluorine (HF) outgassing at levels that do not fall within manufacturing requirements of certain applications, such as intermetal dielectric application of integrated semiconductor devices. The dielectric constant of the film may rise due to the loss of fluorine and water vapor absorption, resulting in a reduction in device speed. HF may corrode, and even destroy, other device features such as metal lines or antireflective layers, thereby degrading device performance. These problems are exacerbated when the halogen-doped dielectric layer undergoes subsequent processing steps in device integration such as chemical mechanical polishing (CMP) planarization.
The instability of fluorine bonding to silicon atoms can be developed over a long period of time during or after semiconductor device integration. For instance, moisture uptake by the dielectric film, resulting in —H and —OH absorption and subsequent undesirable Si—H, Si—OH, and H—F formation with decomposition of Si—F bonds, may occur at different thermal cycles during integration. Those unstable species such as H, OH, H
2
O, and HF will be condensed at the interface of different layers of integrated films. The condensation at the interface may form a cloudy haze, or even bubbles, which eventually will cause delamination of the film and destroy the semiconductor device. This type of moisture absorption may be controlled by the wafer processing shelf-life time or ambient conditions. Since modem device fabrication often uses distributed processing where a wafer is processed at several different locations under different chemical and physical conditions over a period of several weeks, it will be very difficult to control the shelf-life time and all process conditions to prevent haze and bubbles from forming. Furthermore, if haze or bubbles are developed, not only does the entire wafer need to be rejected from the processing sequence, but also the rest of the wafer may be sacrificed.
Generally speaking, the higher the concentration of fluorine during deposition of the fluorine-doped layer, the more unstable the fluorine bonds that are formed and the greater the propensity to form haze. Thus, chip manufacturers may use a relatively low concentration of fluorine just to increase process margin. If manufacturers could rely on producing a more stable film, however, they could increase the fluorine concentration and enjoy the resultant benefit of a dielectric layer with a lower dielectric constant to enhance the device speed.
Problems such as moisture absorption and outgassing are also present in other low dielectric constant layers. For example, a low density silicon oxide layer derives its low dielectric constant from an increase in porosity. The increased porosity, however, renders the layer more susceptible moisture absorption and outgassing.
When sputter deposition is used to form a doped dielectric layer, the stability and integration problems of the layer are believed to be caused at least in part by sputtering. Sputter deposition is commonly used in an HDP-CVD process for gap-fill in which physical sputtering of the dielectric layer by ion bombardment keeps the trench open during gap-fill to prevent premature closing of the trench and minimize the formation of voids during deposition of the dielectric layer. The effects of the physical sputtering dep-etch technique is shown in
FIG. 1. A
substrate
10
has a gap
12
between two islands
14
which define the sidewalls of the gap
12
. Ions
24
incident on the dielectric material of the layer
25
transfer energy thereto by collision, allowing atoms
26
to overcome local binding forces and eject therefrom. During the dep-etch process, dielectric material fills the gap
12
forming a surface
28
. The surface
28
lies in a plane that extends obliquely to the sidewalls of the islands
14
, commonly referred to as a facet. Sputtering can keep the trench open during trench fill to minimize void formation due to premature closing of the trench. Excessive sputtering, however, can lead to void formation by redeposition of the sputtered material and result in unstable film characteristics.
What is needed are methods and apparatus for depositing stable dielectric layers such as halogen-doped layers and low density dielectric layers having relatively low dielectric constants and improved integration characteristics.
SUMMARY OF THE INVENTION
The present invention provides methods and apparatus for depositing stable dielectric layers. Specific embodiments provide improved methods for depositing a composite insulating film having three layers. A first layer has a low dielectric constant derived from the presence of dopants such as fluorine or from the increased porosity of a low density layer. A relatively thin second layer of undoped or slightly doped dielectric material such as silicon oxide, nitride, or oxynitride is formed over the first layer. A third layer such as a fluorine-doped layer having a low dielectric constant is formed over the second layer. The third layer may contain the same dielectric material as the first layer, or a different material. The second layer is more stable than the first layer and serves to protect the first layer by substantially isolating it from subsequent process steps suc

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