Controlling global bit line pre-charge time for high speed...

Details Controlling global bit line pre-charge time for high speed... Controlling global bit line pre-charge time for high speed...

2008-01-07

2010-06-08

Nguyen, Viet Q (Department: 2827)

Static information storage and retrieval

Read/write circuit

Precharge

C365S205000, C365S233160, C365S189020, C365S189080, C365S204000, C365S210120

Reexamination Certificate

active

07733724

ABSTRACT:
A method of operating a memory includes performing a write operation and a read operation on a memory cell. The write operation includes starting a first global bit line (GBL) pre-charge on a GBL; and after the first GBL pre-charge is started, enabling a word line to write into the memory cell, wherein the steps of starting the first GBL pre-charge and enabling the word line have a first time interval. The read operation includes starting a second GBL pre-charge on the GBL; and after the second GBL pre-charge is started, enabling the word line to read from the memory cell, wherein the steps of starting the second GBL pre-charge and enabling the word line have a second time interval. The first time interval is greater than the second time interval.

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