Composite etching stop in semiconductor process integration

Details Composite etching stop in semiconductor process integration Composite etching stop in semiconductor process integration

2006-05-09

2006-05-09

Nhu, David (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S649000, C257S652000

Reexamination Certificate

active

07042049

ABSTRACT:
A new method of forming a composite etching stop layer is described. An etching stop layer is deposited on a substrate wherein the etching stop layer is selected from the group consisting of: silicon carbide, silicon nitride, SiCN, SiOC, and SiOCN. A TEOS oxide layer is deposited by plasma-enhanced chemical vapor deposition overlying the etching stop layer. The composite etching stop layer has improved moisture resistance, better etching selectivity, and lower dielectric constant than other etching stop layers.

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patent: 6753260 (2004-06-01), Li et al.

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