CMOS on SOI substrates with hybrid crystal orientations

Details CMOS on SOI substrates with hybrid crystal orientations CMOS on SOI substrates with hybrid crystal orientations

2005-11-30

2008-10-07

Fourson, George (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S150000, C438S154000, C438S198000, C438S221000, C438S404000, C257S064000, C257S068000, C257S351000, C257SE21562

Reexamination Certificate

active

07432149

ABSTRACT:
Methods and structures for CMOS devices with hybrid crystal orientations using double SOI substrates is provided. In accordance with preferred embodiments, a manufacturing sequence includes the steps of forming an SOI silicon epitaxy layer after the step of forming shallow trench isolation regions. The preferred sequence allows hybrid SOI CMOS fabrication without encountering problems caused by forming STI regions after epitaxy. A preferred device includes an NFET on a {100} crystal orientation and a PFET on a {110} crystal orientation. An NMOS channel may be oriented along the <100> direction, which is the direction of maximum electron mobility for a {100} substrate. A PMOS channel may be oriented along the <110> direction, which is the direction where hole mobility is maximum for a {110} substrate.

REFERENCES:
patent: 4442448 (1984-04-01), Shimbo
patent: 4857986 (1989-08-01), Kinugawa
patent: 4889829 (1989-12-01), Kawai
patent: 5384473 (1995-01-01), Yoshikawa et al.
patent: 6107125 (2000-08-01), Jaso et al.
patent: 6660588 (2003-12-01), Yang et al.
patent: 6784071 (2004-08-01), Chen et al.
patent: 6878646 (2005-04-01), Tsai et al.
patent: 6879000 (2005-04-01), Yeo
patent: 6902962 (2005-06-01), Yeo et al.
patent: 6967132 (2005-11-01), Gonzalez et al.
patent: 6972478 (2005-12-01), Waite et al.
patent: 7023055 (2006-04-01), Ieong et al.
patent: 7208815 (2007-04-01), Chen et al.
patent: 7268377 (2007-09-01), Ieong et al.
patent: 7298009 (2007-11-01), Yan et al.
patent: 2004/0256700 (2004-12-01), Doris et al.
patent: 2005/0035345 (2005-02-01), Lin et al.
patent: 2005/0082531 (2005-04-01), Rim
patent: 2006/0073646 (2006-04-01), Yang
patent: 2006/0091427 (2006-05-01), Waite et al.
patent: 2006/0148154 (2006-07-01), Shin et al.
patent: 2006/0170045 (2006-08-01), Yan et al.
patent: 2006/0194421 (2006-08-01), Ieong et al.
patent: 2006/0281235 (2006-12-01), Tayanaka
patent: 2006/0284251 (2006-12-01), Hsu et al.

Affiliated with

Also associated with

Rating

CMOS on SOI substrates with hybrid crystal orientations does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with CMOS on SOI substrates with hybrid crystal orientations, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and CMOS on SOI substrates with hybrid crystal orientations will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4004138