Chip underfill in flip-chip technologies

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip

Reexamination Certificate

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C438S108000, C257SE21508

Reexamination Certificate

active

11276380

ABSTRACT:
A semiconductor structure and method for forming the same. The semiconductor structure includes (a) a substrate and (b) a chip which includes N chip solder balls, N is a positive integer, and the N chip solder balls are in electrical contact with the substrate. The semiconductor structure further includes (c) first, second, third, and fourth corner underfill regions which are respectively at first, second, third, and fourth corners of the chip, and sandwiched between the chip and the substrate. The semiconductor structure further includes (d) a main underfill region sandwiched between the chip and the substrate. The first, second, third, and fourth corner underfill regions, and the main underfill region occupy essentially an entire space between the chip and the substrate. A corner underfill material of the first, second, third, and fourth corner underfill regions is different from a main underfill material of the main underfill region.

REFERENCES:
patent: 2003/0107110 (2003-06-01), Ma
patent: 2004/0080043 (2004-04-01), Tsai et al.
patent: 2005/0074547 (2005-04-01), Morganelli et al.
patent: 2005/0146050 (2005-07-01), Chen et al.
patent: 2005/0170188 (2005-08-01), Campbell et al.
patent: 2005/0170630 (2005-08-01), Kuo et al.
patent: 2006/0071337 (2006-04-01), Shi et al.
patent: 2006/0163749 (2006-07-01), Lee et al.

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