Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2000-11-21
2002-03-19
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S713000
Reexamination Certificate
active
06358856
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to contact hole patterning. More particularly, this invention relates to bright field image reversal for contact hole patterning.
2. Description of the Related Art
Semiconductor critical dimensions (CD) are becoming increasingly smaller to accommodate faster, smaller and more powerful semiconductor devices.
Contact holes are an important requirement for forming semiconductor devices. Typically, contact holes are formed using a dark field mask and a positive photoresist. Positive photoresists are typically three-component materials, having a matrix component, a sensitizer component, and a solvent component, whose properties are changed by a photochemical transformation of the photosensitive component, from that of a dissolution inhibitor to that of a dissolution enhancer. See, for example, R. Wolf, Silicon Processing for the VLSI Era, Volume 1, page 418.
For forming very small contact hole features, such as contact holes or vias less than 100 nanometers in dimension, dark field patterning causes some problems, since it provides for poor CD control in these very small size ranges. This is primarily due to the resolution of small contact hole features using a dark field mask and positive photoresist being difficult to control due to resolution limits and high mask error factor sensitivity (MEF).
SUMMARY OF THE INVENTION
Accordingly, it is a general object of the present invention to provide an improved method of forming small contact holes for semiconductor devices.
In accordance with a preferred embodiment of the present invention, the above object may be achieved by a method of forming a contact hole for a semiconductor device. The method includes a step of forming an interlayer dielectric layer on a substrate, and then forming a positive resist on the interlayer dielectric layer. The method then includes a step of irradiating the positive resist using a bright field mask, with reversed polarity (dark vs. bright) of a normal contact mask. The bright field mask has a dimension equal in size to a dimension of a contact hole to be formed within the semiconductor device. The method further includes a step of developing the irradiated positive resist, so as to remove the irradiated positive resist, thereby leaving only a portion of the positive resist remaining above the interlayer dielectric layer. The method still further includes a step of applying a negative resist to cover the interlayer dielectric layer and the portion of the positive resist, and then recessing the negative resist so that a top region of the portion of the positive resist extends above the recessed negative resist. The method also includes a step of exposing the recessed negative resist and the portion of the positive resist to a flood light exposure, and then applying a developer to the semiconductor device so as to remove the portion of the positive resist. As a result, a via or contact hole is formed in the location where the portion of the positive resist was previously formed.
The above object may also be achieved by a method for forming a contact hole for a semiconductor device. The method includes forming a first layer on a substrate, and then forming a positive resist on the first layer. The method also includes irradiating the positive resist using a bright field mask, wherein the bright field mask has a dimension equal in size to a dimension of a contact hole to be formed within the semiconductor device. The method further includes subjecting the irradiated positive resist to a developer, so as to remove the irradiated positive resist, thereby leaving only a portion of the positive resist remaining above the first layer. The method still further includes applying a negative resist to cover the first layer and the portion of the positive resist. The method also includes recessing the negative resist so that the portion of the positive resist is not covered on its top surface by the negative resist. The method further includes exposing the recessed negative resist and the portion of the positive resist to light. The method still further includes applying a developer to the semiconduct of device so as to dissolve the portion of the positive resist. As a result, a contact hole is formed in a location where the portion of the positive resist was previously formed.
REFERENCES:
patent: 5891807 (1999-04-01), Muller et al.
patent: 5976944 (1999-11-01), Czagas et al.
patent: 6054254 (2000-04-01), Sato et al.
patent: 6080654 (2000-06-01), Manchester
patent: 6218057 (2001-04-01), Cirelli et al.
R. Wolf et al., Silicon Processing for the VLSI Era, vol. I, 1990 edition, pp. 418, 420.
Lukanc Todd P.
Lyons Christopher F.
Plat Marina V.
Subramanian Ramkumar
Advanced Micro Devices , Inc.
Dang Phuc T.
Foley & Lardner
Nelms David
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