Bond pad for wafer and package for CMOS imager

Details Bond pad for wafer and package for CMOS imager Bond pad for wafer and package for CMOS imager

2006-08-18

2009-11-24

Le, Thao X (Department: 2892)

Semiconductor device manufacturing: process

Semiconductor substrate dicing

Having specified scribe region structure

C257S620000

Reexamination Certificate

active

07622364

ABSTRACT:
An electronic packaging having at least one bond pad positioned on a chip for effectuating through-wafer connections to an integrated circuit. The electronic package is equipped with an edge seal between the bond pad region and an active circuit region, and includes a crack stop, which is adapted to protect the arrangement from the entry of deleterious moisture and combination into the active regions of the chip containing the bond pads.

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