BGA semiconductor chip package and mounting structure thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads

Reexamination Certificate

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Details

C257S693000, C257S773000, C257S776000, C257S784000, C257S786000, C257SE23021, C257SE23069

Reexamination Certificate

active

07368821

ABSTRACT:
In example embodiments of the present invention, a structure of a BGA semiconductor chip package includes a substrate having first and second surfaces, a semiconductor chip having a plurality of bonding pads, and mounted on the first surface of the substrate, and plurality of in/out (I/O) solder balls and dummy solder balls provided on the second surface of the substrate, wherein the I/O solder balls are electrically connected to the semiconductor chip and the dummy solder balls are electrically isolated from the semiconductor chip, and the I/O solder balls and the dummy solder balls have the same ball size and ball pitch and are uniformly provided over the second surface of the substrate.

REFERENCES:
patent: 6380621 (2002-04-01), Ando et al.
patent: 2003/0102535 (2003-06-01), Burnette et al.
patent: 2004/0183205 (2004-09-01), Yamaguchi
patent: 9-64519 (1997-03-01), None
patent: 10-112478 (1998-04-01), None
patent: 2003-017530 (2003-01-01), None
patent: 2003-100801 (2003-04-01), None
patent: 10-2004-0014177 (2004-02-01), None
Korean Office Action dated Jul. 31, 2006.

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