Radiant energy – Inspection of solids or liquids by charged particles
Reexamination Certificate
1999-01-12
2002-05-21
Anderson, Bruce (Department: 2881)
Radiant energy
Inspection of solids or liquids by charged particles
C250S42300F
Reexamination Certificate
active
06392229
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a semiconductor manufacturing method and system and more particular to a method and system that includes monitoring and quality control constituents such as overlay (OL) and critical dimension (CD) tools.
REFERENCES
There follows a list of references that is referenced in the following description.
1. http://www.sematech.org/public/dict/home.htm
2. http://www.encyclopedia.com/articles/13734.html
3. http://www.fullman.com/semiconductors/index.html
4. http://www.veeco.com/metrology.html
5. U.S. Pat. No. 4,724,318 February 1988 Gerd K. Binning
6. U.S. Pat. No. 5,189,906 March 1993 Elings et al
7. U.S. Pat. No. 5,666,190 September 1997 Quate and Minne
8. http://www.york.ac.uk/org/esca/tech/afm.html
9. http://home.ee.umanitoba.ca/~spm/index.html
10. http://www.topometrix.com/afmodes1.htm
11. http://www.a1.com/asm/afmpage.htm
12. http ://spm.aif.ncsu.edu/papers/characterizer.htm
13. http ://www.lucent.dk/press/ 1297/971210.blab.html
14. U.S. Pat. No. 5,798,529 August 1998 Wagner
15. U.S. Pat. No. 5,117,110 May 1992 Masatoshi
16. W.O. Patent 98/30866 January 1998 Samsavar et al.
17. http://www.laurin.com/DataCenter/Dictionary/CD/df/fibeopfa.htm
18. Semicon daily news, Jul. 11, 1995 Page 58 Digital Instruments Dimension™ 7000 Autowafer™ AFM
Glossary
AFM
Atomic Force Microscopy
CAD
Computer Aided Design
CD-SEM
Critical Dimension Scanning Electron Microscopy
CMP
Chemical-Mechanical Planarization or Polishing
Critical
(CD) The width of a patterned line or the distance
Dimension
between two lines, monitored to maintain device
performance consistency; in general, the dimension
of a specified geometry that must be within design
tolerances [1], in microelectronic manufacturing
CD is defined as the smallest width of a line or the
smallest space between two lines which is to be
permitted in the fabrication of a integrated circuit or
“chip”.
Die
A small piece of silicon wafer, bounded by adjacent
scribe lines in the horizontal and vertical directions,
that contains the complete device being manufactured.
[1] Also called chip and microchip. Also:
An individual device cut from a wafer before it is
packaged.
Fab
The main manufacturing facility for processing
semiconductor wafers. [1]
Fiber Optic
A plate made up of thousands of glass fibers arranged
Faceplate
parallel to one another, i.e., in a coherent bundle, and
fused together so that it is hermetically tight. It
transfers an image from one plane to another. [16]
FEM
Focus Exposure Matrix
Metrology
Metrology is the science of measurement of standards
and methods, using units and standards for expressing
the amount of some quantity, such as length, capacity,
or weight [2].
overlay
(OL, OVL) The precision with which successive
masks can be aligned vis-a-vis with previous patterns
on a silicon wafer [1].
Photo-
A process in which a masked pattern is projected onto
lithography
a photosensitive coating that covers a substrate. [1]
Light is shined through the non-opaque portions of a
pattern, or photomask, onto a piece of specially coated
silicon or other semiconductor material. The portions
of the coating that were exposed to light harden, and
the unhardened coating is removed, as by an acid bath.
The uncovered silicon is altered to produce one layer
of the integrated circuit. Advances in this technique
have replaced visible and ultraviolet light frequencies
with electron and X-ray beams, which permit smaller
feature sizes in the patterns. Also called “photo”,
“litho” and “lithography”.
Photoresist
A radiation-sensitive material that, when properly
applied to a variety of substrates and then properly
exposed and developed, masks portions of the sub-
strate with a high degree of integrety. [1] The
resist is poured onto the wafer in a liquid, viscuous
state, spun to a uniform thickness, exposed to a device
pattern using a lithography process and developed.
During developing, exposed portions of positive resist
are removed leaving a “positive” image of the mask
pattern on the surface of the wafer. Although rarely
used today, a negative resist process removes unex-
posed portions of the photoresist leaving a “negative”
image.
Recipe
(In IC manufacturing:) computer program that controls
the various steps of manufacture. The term is also used
in connection with i.a. prescriptions, procedures, and
chemical composition of the various baths.
SCM
Scanning Capacitance Microscopy
Semiconductor
An element that has an electrical resistivity in the range
between conductors (such as aluminim) and insulators
(such as silicon dioxide). Integreated circuits are typically
fabricated in semiconductor materials such as silicon,
gernamium, or gallium arsenide. [1] By doping with
impurities, it can be made slightly conductive (n-type) or
slightly insulative (p-type).
Stepper
Equipment used to transfer a reticle pattern onto a wafer
[1]. The device that exposes a photoresist coated wafer
surface using one or more reticle masks. The term
derives from the operation of making small x- and y-axes
step offsets to align the reticle(s) with each die position.
Track
Area where various stations are situated performing
manufacturing steps such as coating, cleaning, stripping,
etc.
Wafer
A thin slice with parallel paces cut from a semiconductor
crystal [1]. Also: a silicon disc, commonly (but not
confined to) {fraction (1/40)}″ thick and anywhere from 75 mm (3″)
to 300 mm (12″) in diameter, used to form the substrate
of a device. During manufacturing, a wafer may contain
several hundred devices. Each individual device on a
wafer is called a die.
BACKGROUND OF THE INVENTION
The ongoing trend of increasing the density of semiconductors in order to answer to today's need for ultra-large scale integrated (ULSI) semiconductor devices has led to the urgency of advanced monitoring and quality control of each and every step of the semiconductor manufacturing process. Particularly, the monitoring of the photolithographic step is becoming increasingly important.
There follows a description of prior art that is related to the photolithographic process.
After creation of polysilicon, crystal pulling, wafer slicing, lapping and polishing, and after wafer epitaxial processing (for more details, attention is directed to the semiconductor manufacturing process on the Fullman Company Website [3]), the wafer is transported to the lithography station.
Resist coating, development, alignment and exposure are the main steps in the photolithographic process that transfers the circuit pattern for one layer from a photomask or reticle onto the light-sensitive photoresist on the wafer surface.
Attention is directed to
FIG. 1
, which is a schematic representation of a typical track where the lithography steps are performed.
The track
10
is in principal, a platform on which a multiple of stations that perform specific tasks are situated. The wafer is usually part of a batch of wafers, loaded in a cassette, containing a number (e.g. 25 units) of wafers. The cassette is loaded onto the track at the loading station
11
. From here, a centralized robotic arm
12
will move one wafer at the time from one station to another station under the control of a “recipe” or computer program that defines the procedures a wafer has to undergo during the photolithography.
At the onset, the robotic arm transports the wafer to the center alignment station
13
. Here, the wafer is precisely positioned to ensure the wafer is situated concentrically. (Optionally, the wafer is returned at various points during the photolithographic step back to this station for critical re-alignment). The wafer is then transported to a cleaning station
14
, to ensure maximum surface cleanness before being moved to the coating station
15
. Here the photoresist is deposited on the wafer in a predefined amount of viscous fluid. The photoresist is thinly distributed evenly over the total surface of the wafer by means of fast spinning. The wafer is then tr
Bach Joseph
Dana Stephane
Anderson Bruce
Applied Materials Inc.
Sughrue, Mion, Zinn, MacPeak & Seas
LandOfFree
AFM-based lithography metrology tool does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with AFM-based lithography metrology tool, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and AFM-based lithography metrology tool will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2847033