Adhesive bonding and miscellaneous chemical manufacture – Differential fluid etching apparatus
Reexamination Certificate
2001-08-16
2004-03-16
Norton, Nadine G. (Department: 1765)
Adhesive bonding and miscellaneous chemical manufacture
Differential fluid etching apparatus
C156S345230, C156S345290, C156S345340, C156S345440
Reexamination Certificate
active
06706138
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a substrate processing chamber. More particularly, the invention relates to a method and apparatus for delivering power to a processing chamber.
2. Background of the Related Art
Plasma etching and reactive ion etching (RIE) have become important processes in precision etching of certain workpieces such as substrates in the fabrication of semiconductor devices. The differences between plasma etching and reactive ion etching, which generally can be carried out in the same equipment, typically result from different pressure ranges employed and from the consequential differences in mean free path of excited reactant species in a processing chamber. The two processes are collectively referred to herein as plasma etching. Plasma etching is a “dry etching” technique and has a number of advantages over conventional wet etching in which the workpiece is generally immersed in a container of liquid etchant material. Some of the advantages include lower cost, reduced pollution problems, reduced contact with dangerous chemicals, increased dimensional control, increased uniformity, improved etch selectivity, and increased process flexibility.
As integrated circuit densities increase, device feature sizes decrease below 0.25 micron while the aspect ratio (i.e., ratio of feature height to feature width) of the device features increase above 10:1. Improved precision of the etch process is required to form these small device features having high aspect ratios. Additionally, an increased etch rate is desired to improve throughput and reduce costs for producing integrated circuits.
One type of plasma etch chamber utilizes two parallel plate electrodes to generate and maintain a plasma of the process gases between the plate electrodes. Typically, a parallel plate plasma etch chamber includes a top electrode and a bottom electrode. The bottom electrode typically serves as a substrate holder, and a substrate (or wafer) is disposed on the bottom electrode. The etch process is performed on a surface of the substrate that is exposed to the plasma.
Typically, one or more of the electrodes are connected to a power source. In a particular parallel plate reactor, those electrodes are connected to high frequency power sources. The power source connected to the upper electrode is typically operated at a higher frequency than the power source connected to the lower electrode. This configuration is believed to avoid damage to materials disposed on a substrate.
Another parallel plate reactor has two power sources connected to a lower electrode. The power sources are each operated at different frequencies in order to control the etching characteristics resulting on a substrate being processed.
Yet another parallel plate reactor includes three electrodes. A first electrode is adapted to support a substrate and is connected to a low frequency AC power source. A second electrode is disposed in parallel relationship with the first electrode and is connected to ground. A third electrode (i.e., the chamber body) disposed between the first and second electrode is powered by a high frequency AC power source.
Another conventional apparatus provides a single powered electrode reactor. High and low frequency power supplies are coupled to the single electrode in an effort to increase process flexibility, control and residue removal. The single electrode reactor includes a multistage passive filter network. The network is intended to perform the functions of coupling both power supplies to the electrode, isolating the low frequency power supply from the high frequency power supply and attenuating the undesired frequencies produced by mixing of the two frequencies in the nonlinear load represented by the reactor.
A more detailed description of dual frequency parallel plate reactors can be found in U.S. Pat. No. 4,464,223, entitled “Plasma Reactor Apparatus and Method,” assigned to Tegal Corp., and issued Aug. 7, 1984; U.S. Pat. No. 5,512,130, entitled “Method and Apparatus of Etching a Clean Trench in a Semiconductor Material,” assigned to Texas Instruments, Inc., issued Apr. 30, 1996; U.S. Pat. No. 4,579,618, entitled “Plasma Reactor Apparatus, assigned to Tegal Corp., issued Apr. 1, 1986; and U.S. Pat. No. 5,272,417, entitled “Device for Plasma Process, issued Dec. 21, 1993.
One problem typically experienced in a parallel plate plasma etch chamber is that material from the surfaces of the top electrode exposed to the plasma in the chamber is also etched during the etch process. As the top electrode is eroded by the etch process, the material property of the top electrode changes and causes variations of the processing parameters in the chamber, which results in inconsistent or non-uniform processing of substrates. Furthermore, the top electrode may have a short useful life and may need to be replaced frequently, which increases the costs associated with production of the semiconductor devices.
Therefore, there is a need for a parallel plate plasma etch system that can substantially reduce erosion of the top electrode and maintain process uniformity. It would be desirable for the plasma etch system to improve precision of the etch process for forming high aspect ratio sub-quarter-micron interconnect features. It would be further desirable for the plasma etch system to provide an increased etch rate which reduces time and costs of production of integrated circuits.
SUMMARY OF THE INVENTION
The present invention generally provides a parallel plate plasma etch system that can substantially reduce erosion of a top electrode and maintain process uniformity. The plasma etch system improves precision of the etch process for forming high aspect ratio sub-quarter-micron interconnect features. The plasma etch system also provides an increased etch rate which reduces time and costs of production of integrated circuits.
In one aspect, the invention provides an apparatus for processing a substrate comprising a chamber having an electrode, a substrate support disposed in the chamber, a high frequency power source electrically connected to the electrode, a low frequency power source electrically connected to the electrode, and a variable impedance element connected between the substrate support and an electrical ground.
In one embodiment, the electrode comprises a gas distributor, and the electrode and the substrate support form parallel plate electrodes. The high frequency power source is adapted to deliver power at a frequency between about 13.56 MHz and about 500 MHz while the low frequency power source is adapted to deliver power at a frequency between about 100 kHz and about 20 MHz. The variable impedance element is adapted to tune a self bias voltage division between the electrode and the substrate support and is adapted to tune at least one resonant impedance at a frequency selected from at least one of the low frequency and the high frequency.
In another aspect, the invention provides a method for delivering power to a process chamber having a first electrode and a substrate support forming a second electrode comprising delivering a high frequency power from a high frequency power source electrically connected to the first electrode, delivering a low frequency power source from a low frequency power source electrically connected to the first electrode, and connecting a variable impedance element between the substrate support and an electrical ground. In one embodiment, the method further comprises tuning the variable impedance element to control a self bias voltage division between the first electrode and the substrate support. The variable impedance element may be tuned to provide a first resonant impedance at the low frequency and a second resonant impedance at the high frequency.
REFERENCES:
patent: 4464223 (1984-08-01), Gorin
patent: 4579618 (1986-04-01), Celestino et al.
patent: 5272417 (1993-12-01), Ohmi
patent: 5512130 (1996-04-01), Barna et al.
patent: 5585012 (1996-12-01), Wu et al.
patent: 6013155 (2000-01-01), McMillin et
Barnes Michael S.
Holland John
Moghadam Farhad
Paterson Alexander
Todorov Valentin
Applied Materials Inc.
Bach Joseph
Moser Patterson and Sheridan
Norton Nadine G.
Tran Binh X.
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