Adhesion of copper and etch stop layer for copper alloy

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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Details

C438S625000, C438S626000, C438S627000, C438S634000, C438S637000, C438S639000, C438S660000, C438S687000

Reexamination Certificate

active

06967155

ABSTRACT:
A new method and structure is provided for the creation of a copper dual damascene interconnect. A dual damascene structure is created in the layer of dielectric, optionally a metal barrier layer is deposited over exposed surfaces of the dual damascene structure. A copper seed layer is deposited, the dual damascene structure is filled with copper. An anneal is applied to the created copper interconnect after which excess copper is removed from the dielectric. Of critical importance to the invention, a thin layer of oxide is then deposited as a cap layer over the copper dual damascene interconnect, an etch stop layer is then deposited over the thin layer of oxide for continued upper-level metallization.

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TSMC-01-1676, U.S. Appl. No. 10/361,732, filed Feb. 10, 2003, assigned to common assignee, “Barrier Free Copper Interconnect by Multi-Layer Copper Seed”.
TSMC-02-338, U.S. Appl. No. 10/350,837, filed Jan. 24, 2003, assigned to common assignee, “Improved Method of Barrier-Less Integration with Copper Alloy”.

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