Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2005-12-13
2005-12-13
Decady, Albert (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
Reexamination Certificate
active
06976199
ABSTRACT:
In an LSSD/LBIST scan design, AC scan test coverage is enhanced with a scan chain configuration capable of selectively inverting scan-in signals. For example, one or more XOR gates are inserted in the scan chain. The XOR gates is controlled by a control signal preferably coming from a primary input such that original scan-in signals as well as inverted scan-in signals are shifted into the scan chain. The proposed configuration significantly enhances the AC test coverage for a scan chain having adjacent SRLs feeding the same cone of logic by adding a simple logic circuit such as an XOR gate between the adjacent SRLs.
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Berry, Jr. Robert Walter
Saunders Michael Timothy
Carr LLP
De'cady Albert
Gerhardt Diana R.
International Business Machines - Corporation
Trimmings John P.
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