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Simultaneous resynchronization by command for state machines...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Simultaneous writing and reconstruction of a redundant array...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Simultaneously multithreaded processing and single event...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Simultaneously multithreaded processing and single event...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Single chip processor with externally executed test function

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent

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Single I/O session to commit a single transaction

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Single platform electronic tester

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Single point of entry/origination item scanning within an...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Single step debug card using the PCI interface

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Single-chip memory system having a redundancy judging circuit

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Patent

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Single-processor system

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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SIP server architecture fault tolerance and failover

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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SIP server architecture for improving latency during message...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Situational aware output configuration and execution

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Situational aware output configuration and execution

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Sliding window mechanism for data capture and failure analysis

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Slow response in redundant arrays of inexpensive disks

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Smart card for high-availability clustering

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Smart card for high-availability clustering

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Smart debug interface circuit

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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