Simultaneous resynchronization by command for state machines...

Details Simultaneous resynchronization by command for state machines... Simultaneous resynchronization by command for state machines...

1999-02-25

2002-10-22

Beausoleil, Robert (Department: 2184)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S801000, C711S114000, C375S354000, C370S350000

Reexamination Certificate

active

06470462

ABSTRACT:

BACKGROUND
1. Field of the Invention
The present invention pertains to synchronizing of a redundant system, and particularly to synchronizing of a redundant computer system having two independent units which execute the same tasks simultaneously.
2. Related Art and other Considerations
Some activities are so supremely important that it is judicious to have two units or processors for performing the activities, just in case one of the units malfunctions or terminates (e.g., crashes). Such is expected to be the case in future generations of mobile telecommunications systems, for example. See U.S. Pat. No. 5,469,503 to Butensky et al. which discloses a recovery algorithm for a redundant system in a telecommunications environment.
In such mission critical situations, multiple units (e.g., computer processors or CPUs) are employed. In some instances, one or more of the units serves the role of a standby unit that is essentially idle until such time as it is necessary to replace an active unit. In other instances, multiple redundant units execute the same tasks simultaneously but independently. Unfortunately, in these other instances, the redundant units can, under certain circumstances, become out of phase with one another. In such circumstances it is necessary to re-coordinate or “resynchronize” the redundant units.
Coordination of redundant units has heretofore been addressed using various techniques. One known technique is to have the two redundant systems, e.g., two CPUs, using a same clock and same memory. In this technique, the two CPUs execute the same instructions out of the same memory at the same time, thereby obviating the need for software synchronization. A third unit compares the results from the two CPUs. A disadvantage of this technique is that its implementation requires specialized hardware rather than conventional components.
Employment of a third unit which coordinates synchronization of two processors is taught in U.S. Pat. No. 5,748,873 to Ohguro et al. When a first processor needs to resynchronize with a second processor, the first processor sends a re-synchronizing indication to a match control logic, which then outputs synchronous reset indication signals so that both the first and second processors are reset in synchronism.
Some redundant units (independently executing the same task) comprise state machines which are synchronized on the basis of external stimuli, such as bus events. But if one of the redundant units is reset (e.g., rebooted after a failure or the like), the reset unit somehow has to catch up with the other unit so that the tasks and any state machines of the reset unit can be synchronized. A possible solution to this synchronization problem is to ignore external stimuli and transfer all states from an active unit to the newly reset unit. Unfortunately, this solution would necessitate both units as appearing isolated, at least temporarily during the transfer of states, to external equipment communicating with the two units. If the overall system contains much state information, such resynchronization time might be unacceptably long.
What is needed, therefore, and an object of the present invention, is an effective way of resynchronizing redundant units which employ external stimuli-synchronized state machines.
BRIEF SUMMARY OF THE INVENTION
A redundant system comprises a first unit, a second unit, and a synchronization server. The first unit and a second unit each include plural state machines for performing tasks. At least some of the state machines provided at the first unit simultaneously perform same tasks as at least corresponding ones of some of the state machines provided at the second unit.
In accordance with the invention, when a state machine of a second unit determines that it needs to be resynchronized, the synchronization server receives a resynchronization request from the state machine requesting resynchronization and thereupon provides an out-of-synchronization indication to a corresponding state machine in the first unit. In response to the out-of-synchronization indication from the synchronization server, the corresponding state machine in the first unit generates a resynchronization request at an time deemed appropriate by the corresponding state machine in the first unit. In response to the resynchronization request from the corresponding state machine in the first unit, the synchronization server issues a resynchronization command to both the corresponding state machine in the first unit and the state machine requesting of the second unit which sought resynchronization. The state machines of the first and second units simultaneously resynchronize in response to the resynchronization command.
At least one of the first unit and the second unit includes a restart logic that prescribes an order of restart of the plural state machines when a unit is restarted or rebooted. This provides for a gradual start up of the state machines of the redundant units. Preferably, the prescribed order is on a basis of one state machine at a time. When a state machine is restarted, it is up to the individual state machine when to synchronize in accordance with the steps summarized above.
In an illustrated embodiment, the first unit and the second unit are situated in a node of a cellular telecommunications system, such as a base station (BTS) node, for example.
The synchronization server can be a distinct unit, or can be included in one of the first unit and the second unit.


REFERENCES:
patent: 4569017 (1986-02-01), Renner et al.
patent: 4635186 (1987-01-01), Oman et al.
patent: 4733353 (1988-03-01), Jaswa
patent: 5301308 (1994-04-01), Daar et al.
patent: 5428637 (1995-06-01), Oliva, Jr. et al.
patent: 5452441 (1995-09-01), Esposito et al.
patent: 5469503 (1995-11-01), Butensky et al.
patent: 5579220 (1996-11-01), Barthel et al.
patent: 5583986 (1996-12-01), Park et al.
patent: 5680594 (1997-10-01), Charneski et al.
patent: 5748873 (1998-05-01), Ohguro et al.
patent: 5841963 (1998-11-01), Nakamikawa et al.
patent: 6223304 (2001-04-01), Kling et al.
patent: 2 308 040 (1997-06-01), None
patent: 96/02115 (1996-01-01), None

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