Address generators for mapping arrays in bit reversed order

Addressing mode and/or instruction for providing sine and...

Adjustable time accumulator

Advanced execution of extended floating-point add operations...

Algorithm (Method) and VLSI architecture for fast evaluation...

Algorithm for configuring clocking system

Algorithm for configuring clocking system

Alternate booth partial product generation for a hardware...

Alternate phase dual compression-tree multiplier

Analog adaptive FIR filter having independent coefficient...

Analog data compression

Analog data compression

Analog delay elements

Analog discrete-time FIR filter

Analog filter suitable for smoothing a...

Analog fir filter with parallel interleaved architecture

Analog multiplier using triple-tail cell

Analog wavelet transformer

Angle calculation circuit

Antenna treatment method and system