Managing power in a parallel computer
Managing power states in a computer system
Matching system of electronic device and peripheral device...
MCU with low power mode of operation
Means for reactivating a system operating in "sleep" mode
Means for saving electrical power
Mechanism for processor power state aware distribution of...
Mechanism for providing measured power management...
Mechanism for reducing power consumption of a...
Mechanism for saving power on long latency stalls
Mechanism for self refresh during advanced configuration and...
Mechanism to control di/dt for a microprocessor
Memory clock slowdown
Memory control system
Memory device having a power down exit register
Memory management to enable memory deep power down mode in...
Memory modules that receive clock information and are placed...
Memory modules that receive clock information and are placed...
Method and an apparatus for managing power consumption of a...
Method and apparatus allowing a battery to regain charge in...