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Partitioned cache memory with switchable access paths

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Partitioned cache of multiple logical levels with adaptive...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Partitioned library

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Partitioned single array cache memory having first and second st

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Partitioning a memory pool among plural computing nodes

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Partitioning and monitoring of software-controlled system

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Partitioning memory mapped device configuration space

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Partitioning memory shared by multiple processors of a...

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
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Partitioning method for configuring a data storage medium...

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Partitioning modules for cross-module optimization

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Pass-through write policies of files in distributed storage...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Passing internal bus data external to a completed system

Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
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Patch memory system for a ROM-based processor

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Patching ROM code

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Patrol snooping for higher level cache eviction candidate...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Pattern detect and byte align circuit using CAM

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Pattern detect and byte align circuit using CAM

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Pattern generator for a packet-based memory tester

Electrical computers and digital processing systems: memory – Address formation – Generating a particular pattern/sequence of addresses
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Pausing and resuming applications running in a data processing s

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Peer-to-peer cache moves in a multiprocessor data processing...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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