Partitioned single array cache memory having first and second st

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories

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711125, 711173, G06F 1208

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active

057377502

ABSTRACT:
A cache memory which is partitioned during write operations into several regions in a programmable or adaptive manner is disclosed. Each region is used to store a different type of data. The partitioning of the cache memory has no effect during read operations. The partitioning can be achieved dynamically for improved optimization. The partitioned cache is particularly suited for an instruction cache wherein one of the regions stores sequential instructions and another region stores branch target instructions. However, the partitioned cache is also useful for a data cache.

REFERENCES:
patent: 4583162 (1986-04-01), Prill
patent: 4905141 (1990-02-01), Brenza
patent: 4945512 (1990-07-01), DeKarske et al.
patent: 5101344 (1992-03-01), Bonet et al.
patent: 5230068 (1993-07-01), Van Dyke et al.
patent: 5293609 (1994-03-01), Shih et al.
patent: 5357623 (1994-10-01), Megory-Cohen
patent: 5381528 (1995-01-01), Brunelle
patent: 5434992 (1995-07-01), Mattson
patent: 5537571 (1996-07-01), Deville
patent: 5594884 (1997-01-01), Matoba et al.
patent: 5619699 (1997-04-01), Katsuta
Hwu et al., "Comparing Software and Hardware Schemes for Reducing the Cost of Branches", 16th. Annual International Symposium on Computer Architecture, pp. 224-231, 1989.
David R. Ditzel & Hubert R. McLellan, "Branch Folding in the CRISP Microprocessor Reducing Branch Delay to Zero", AT&T, pp. 2-9, (ACM 0084-7495).
B. Ramakrishna Rau "Levels of Representation of Programs and the Architecture of Universal Host Machines", University of Illinois, Report R-819, Aug. 1978, pp. 1-44.

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