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Programmer initiated cache block operations

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Addressing cache memories
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Programming and verification address generation for random acces

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or...
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Programming and verification address generation for random acces

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or...
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Programming circuits and techniques for programmable logic

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Programming circuits and techniques for programmable logic

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Programming device for non-volatile memory and programming...

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Programming flash in a closed system

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Programming means for dynamic specifications of cache...

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Programming models for eviction policies

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Programming models for storage plug-ins

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Programming protection status indicators for flash memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Programming suspend status indicator for flash memory

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Promoting device level error to raidset level error to restore r

Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
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Promoting local memory accessing and data migration in non-unifo

Electrical computers and digital processing systems: memory – Address formation – Address mapping
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Promotion or demotion of backup data in a storage hierarchy...

Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
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Proportionally growing stack in a linear memory array

Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
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Proposal of capacity tuning in the production process of...

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – Dynamic-type storage device
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Proposed configuration management behaviors in a raid subsystem

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
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Proprammable DRAM address mapping mechanism

Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
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Protect circuit of register

Electrical computers and digital processing systems: memory – Storage accessing and control
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