Method to selectively recess ETCH regions on a wafer surface...

Details Method to selectively recess ETCH regions on a wafer surface... Method to selectively recess ETCH regions on a wafer surface...

2007-01-30

2007-01-30

Whitehead, Jr., Carl (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S275000, C438S300000, C257S369000, C257S382000

Reexamination Certificate

active

10931195

ABSTRACT:
The present invention facilitates semiconductor fabrication by providing methods of fabrication that selectively apply strain to channel regions of devices while mitigating masking operations employed. A CAPOLY layer is formed over an NMOS region of a semiconductor device (102). A recess etch is performed on active regions of devices within a PMOS region of the semiconductor device (104) and the CAPOLY layer prevents etching of devices within an NMOS region of the semiconductor device. Subsequently, an epitaxial formation process (106) is performed that forms or deposits epitaxial regions and introduces a first type of strain across the channel regions in the PMOS region. Then, the semiconductor device is annealed (108) to cause the CAPOLY layer to introduce a second type of strain across the channel regions in the NMOS region. After annealing, the CAPOLY layer is removed (110).

REFERENCES:
patent: 6303486 (2001-10-01), Park
patent: 6368967 (2002-04-01), Besser
patent: 6906393 (2005-06-01), Sayama et al.
patent: 2004/0262694 (2004-12-01), Chidambaram
patent: 2005/0029601 (2005-02-01), Chen et al.
patent: 2005/0139872 (2005-06-01), Chidambaram et al.

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