Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-07-17
2007-07-17
Ton, David (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S738000
Reexamination Certificate
active
10876372
ABSTRACT:
An integrated device including a functional circuitry and a built-in self testing circuit for executing a structured test on the functional circuitry is proposed. The functional circuitry includes means for receiving input test values from the built-in self testing circuit and returning output test values to the built-in self testing circuit. In the solution of the invention, the built-in self testing circuit includes a memory for storing starting test values and expected test values, means for generating the input test values according to the starting test values, and means for determining a result of the structured test according to a comparison between the output test values and the expected test values.
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Jorgenson Lisa K.
Seed IP Law Group PLLC
Stern Ronald
STMicroelectronics S.r.l.
Ton David
LandOfFree
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