4. Error detection/correction and fault detection/recovery
  5. Pulse or data error handling
  6. Digital logic testing

Marco Casarsa

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Asynchronous set-reset circuit device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Integrated device with an improved BIST circuit for...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Scan chain architecture for increased diagnostic capability...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Profile ID: LFUS-PAI-P-2199339

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