Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-03-07
2006-03-07
Smith, Bradley K. (Department: 2891)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S294000, C438S296000
Reexamination Certificate
active
07008847
ABSTRACT:
A semiconductor device including an EEPROM and a Mask-ROM transistor, and methods of fabricating and forming the same, where a device isolation layer may be formed at given regions of a semiconductor substrate to define a cell active region, and a Mask-ROM active region including a channel doped region therein. A channel doped region may be formed within the Mask-ROM active region, and a plurality of Mask-ROM gates may be formed that cross the channel doped region. A Mask-ROM gate insulating layer may be interposed between a Mask-ROM gate and the Mask-ROM active region, and the device isolation layer may have a surface adjacent to the channel doped region that is lower as compared to a surface of the device isolation layer that is not directly adjacent to the channel doped region.
REFERENCES:
patent: 5393684 (1995-02-01), Ghezzi et al.
patent: 5554551 (1996-09-01), Hong
patent: 6140023 (2000-10-01), Levinson et al.
patent: 2003/0111684 (2003-06-01), Park
Harness & Dickey & Pierce P.L.C.
Samsung Electronics Co,. Ltd.
Smith Bradley K.
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