Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-08-09
2005-08-09
Pham, Hoai (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S596000, C438S597000
Reexamination Certificate
active
06927119
ABSTRACT:
A semiconductor device can be provided comprising a semiconductor substrate having an upper surface. A plurality of adjacent line patterns are formed on the upper surface of the semiconductor substrate. Each line pattern includes a line having a capping layer pattern stacked thereon. A material layer covers the upper surface of the semiconductor substrate having the line patterns. A pad contact hole is located between the line patterns within a region of the material layer. The pad contact hole includes a lower opening between the line patterns and an upper opening located above the lower opening. A barrier layer is formed on a side wall defining the upper opening. A landing pad substantially fills the lower opening and the upper opening defined by the barrier layer.
REFERENCES:
patent: 5480814 (1996-01-01), Wuu et al.
patent: 5688713 (1997-11-01), Linliu et al.
patent: 5728595 (1998-03-01), Fukase
patent: 6117757 (2000-09-01), Wang et al.
patent: 2002/0001936 (2002-01-01), Terauchi et al.
Lee Yun-Sung
Park Joo-Sung
Ha Nathan W.
Marger & Johnson & McCollom, P.C.
Pham Hoai
Samsung Electronics Co,. Ltd.
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