Programming flash memory via a boundary scan register

Details Programming flash memory via a boundary scan register Programming flash memory via a boundary scan register

2005-08-30

2005-08-30

Dinh, Son T. (Department: 2824)

Static information storage and retrieval

Interconnection arrangements

C365S189020, C365S189050, C714S727000

Reexamination Certificate

active

06937493

ABSTRACT:
A method and parallel interface for on-board programming and/or In-System Configuration of a flash memory mounted on a printed circuit board by controlling its inputs with the aid of an ASIC mounted on the same circuit board via a Boundary Scan register of which the output signals are provided for activating or deactivating a write operation. The architecture description of the ASIC, flash memory, and the data format of the program and configuration data are stored in a Boundary-Scan Description Language file. The circuit board can be controlled via a JTAG interface suitable for performing function testing of the flash memory for input or output of standard bus signals and for input of the control signals of the ASIC. To reduce the programming effort, the data of the circuit diagram or of the network list derived from it is stored in the BSDL file.

REFERENCES:
patent: 5281864 (1994-01-01), Hahn et al.
patent: 5325368 (1994-06-01), James et al.
patent: 6173428 (2001-01-01), West
patent: 6499124 (2002-12-01), Jacobson
patent: 6774672 (2004-08-01), Lien et al.

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