Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2005-06-14
2005-06-14
Deo, Duy-Vu N. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S714000, C438S723000, C438S725000
Reexamination Certificate
active
06905968
ABSTRACT:
A method is provided for etching a dielectric structure. The dielectric structure comprises: (a) a layer of undoped silicon oxide or F-doped silicon oxide; and (b) a layer of C,H-doped silicon oxide. The dielectric structure is etched in a plasma-etching step, which plasma-etching step is conducted using a plasma source gas that comprises nitrogen atoms and fluorine atoms. As one example, the plasma source gas can comprise a gaseous species that comprises one or more nitrogen atoms and one or more fluorine atoms (e.g., NF3). As another example, the plasma source gas can comprise (a) a gaseous species that comprises one or more nitrogen atoms (e.g., N2) and (b) a gaseous species that comprises one or more fluorine atoms (e.g., a fluorocarbon gas such as CF4). In this etching step, the layer of C,H-doped silicon oxide is preferentially etched relative to the layer of undoped silicon oxide or F-doped silicon oxide. The method of the present invention is applicable, for example, to dual damascene structures.
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Chen Hui
Hsieh Chang-Lin
Panagopoulos Theodoros
Ye Yan
Yuan Jie
Applied Materials Inc.
Bach Joseph
Deo Duy-Vu N.
Mayer Fortkort & Williams
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