Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-08-09
2005-08-09
Pert, Evan (Department: 2826)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
Reexamination Certificate
active
06927117
ABSTRACT:
A CMOS silicide metal integration scheme that allows for the incorporation of silicide contacts (S/D and gates) and metal silicide gates using a self-aligned process (salicide) as well as one or more lithography steps is provided. The integration scheme of the present invention minimizes the complexity and cost associated with fabricating a CMOS structure containing silicide contacts and silicide gate metals.
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Cabral, Jr. Cyril
Kedzierski Jakub T.
Ku Victor
Lavoie Christian
Narayanan Vijay
Pert Evan
Scully Scott Murphy & Presser
Trepp, Esq. Robert M.
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