Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-04-26
2005-04-26
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257S297000, C257S300000
Reexamination Certificate
active
06884681
ABSTRACT:
A method for manufacturing a MirrorBit® Flash memory includes providing a semiconductor substrate and successively depositing a first insulating layer, a charge-trapping layer, and a second insulating layer. First and second bitlines are implanted and wordlines are formed before completing the memory. Spacers are formed between the wordlines and an inter-layer dielectric layer is formed over the wordlines. One or more of the second insulating layer, wordlines, spacers, and inter-layer dielectric layers are deuterated, replacing hydrogen bonds with deuterium, thus improving data retention and substantially reducing charge loss.
REFERENCES:
patent: 6670241 (2003-12-01), Kamal et al.
patent: 6677213 (2004-01-01), Ramkumar et al.
patent: 6740605 (2004-05-01), Shiraiwa et al.
Halliyal Arvind
Kamal Tazrien
Ngo Minh Van
Ramsbey Mark T.
Shiraiwa Hidehiko
FASL LLC
Ishimaru Mikio
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