Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
1998-06-12
2002-07-16
Whitehead, Jr., Carl (Department: 2822)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S623000, C438S780000, C438S781000, C438S782000
Reexamination Certificate
active
06420278
ABSTRACT:
TECHNICAL FIELD
The present invention relates generally to semiconductor manufacturing and more specifically to integrated circuit manufacturing using silicon-based, low dielectric constant materials.
BACKGROUND ART
Silicon compounds, such as silicon dioxide, that can be used as coatings are particularly valuable on electronic substrates. Such coatings serve as protective coatings, inter-level dielectric layers, doped dielectric layers to produce transistor-like devices, multilayer devices, etc.
Unfortunately, development of high integration and high-density very large scale integrated circuits has progressed so rapidly that earlier silicon compounds have become less than satisfactory. The reductions in size have been accompanied by increases in switching speed of such integrated circuits, and this has increased the problems due to capacitance coupling effects between closely positioned, parallel conductive channels connecting high switching speed semiconductor devices in these integrated circuits. This has necessitated a change from using silicon dioxide, which has a dielectric constant in excess of 4.0, to the use of lower dielectric constant materials.
The combination of high density and submicron geometries has also lead to the surfaces of semiconductor substrates having relatively large protrusions and depressions with small spaces in between. This has posed serious problems for fabrication technology because of the difficulty of providing uniform depositions and subsequently planarizing such surfaces. One answer has been to use dielectrics which are deposited in liquid form. By spinning on dielectric films in a liquid form followed by a series of soft bakes and a hard bake to cause solvent evaporation, a high degree of uniformity and planarization have been achievable.
The soft bakes are performed on three different heating elements with a robot arm moving the silicon substrates from one heating element to another. The dielectric film-coated silicon substrates are heated at 150° C., 200° C., and 350° C. for 60 seconds each. This prevents curing of the dielectric film before the solvent evaporates. The hard bake at 400° C. for an hour cures the dielectric film.
The materials that have been used for the spun on dielectric films have included various organic silicon compounds in liquid solvents. These organic silicon compounds have included TBOS (tetraethoxysilane), TMOS (tetramethoxysilane), OMCTS (octamethyleyclotetrasiloxane), HMDS (hexamethyldisiloxane), SOB (trimethylsilil borxle), DADBS (diaceloxyditerliarybutoxsilane), and SOP (trimethylsilil phosphate). And the fluid carrier would be a solvent such as MIBK (methyl isobutyl ketone). One of the more commonly used silicon-based, low dielectric constant materials is HSQ (hydrogen silsesquioxane) in MIBK solvent.
HSQ has a dielectric constant of about 3.5. It has been used successfully in the past, but as further reductions in integrated circuit size and higher speeds are achieved, this dielectric constant is becoming less satisfactory also. Part of the high dielectric constant in organic silane materials is apparently due to a large amount of water containing carbon compounds (unreacted substances) within the material. A major problem is that the series of soft bakes followed by a hard bake as required to evaporate the solvent out of the organic silane materials actually causes the atomic hydrogen in the silane materials to combine with oxygen from the air to form additional entrapped water. If the temperature of the bake is increased, the heat converts the silane material to silicon oxide which has a higher dielectric constant than the silane material with entrapped water so further heating has a negative affect on the integrated circuit. If the time of the bakes is increased, the dielectric film becomes denser, and this has the negative effect of increasing the dielectric constant.
A manufacturing method of producing a silicon-based, low dielectric constant material has long been sought but has eluded those skilled in the art.
DISCLOSURE OF THE INVENTION
The present invention provides a method of manufacturing improved integrated circuits by lowering the dielectric constant of a silicon-based, low dielectric constant material coating on semiconductor wafers by relatively low temperature heating in a vacuum or inert atmosphere.
The present invention provides a method of manufacturing improved integrated circuits which helps evaporate water from and prevents the formation of water in silicon-based, low dielectric constant semiconductor coatings.
The present invention further provides a method of manufacturing improved integrated circuits using silicon-based, low dielectric constant semiconductor coatings without the formation of high dielectric constant silicon oxide.
The present invention still further provides a method of manufacturing improved integrated circuits using silicon-based, low dielectric constant semiconductor coatings having dielectric constants below 2.8.
The present invention even further provides an easier method of manufacturing improved integrated circuits.
The present invention also provides a system which eliminates the soft bake steps and reduce s the processing equipment required.
The above and additional advantages of the present invention will become apparent to those skilled in the art from a reading of the following detailed description when taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 5118530 (1992-06-01), Hanneman et al.
patent: 5145723 (1992-09-01), Ballance et al.
patent: 5441765 (1995-08-01), Ballance et al.
patent: 5470802 (1995-11-01), Gnade et al.
patent: 5488015 (1996-01-01), Havemann et al.
patent: 5523163 (1996-06-01), Ballance et al.
patent: 5549934 (1996-08-01), Garza et al.
patent: 5656555 (1997-08-01), Cho
patent: 5665849 (1997-09-01), Cho
patent: 6130152 (2000-10-01), Smith et al.
Hopper Dawn M.
Huang Richard J.
You Lu
Advanced Micro Devices , Inc.
Guerrero Maria
Ishimaru Mikio
Jr. Carl Whitehead
LandOfFree
Method for improving the dielectric constant of... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for improving the dielectric constant of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for improving the dielectric constant of... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2870690