Register file initialization to prevent unknown outputs...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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C714S030000, C714S031000, C714S036000, C714S709000, C714S724000, C714S727000, C714S729000, C714S731000, C714S733000, C714S734000, C712S227000

Reexamination Certificate

active

07389455

ABSTRACT:
A system and method for initializing a register file during a test period for an integrated circuit, wherein the register file has one or more input ports. A counter, when enabled, is initialized and counts at each write cycle of the register file and outputs a current count value to the input ports of the register file to pre-load the register file to a known state.

REFERENCES:
patent: 4459660 (1984-07-01), Bellay et al.
patent: 4567593 (1986-01-01), Bashaw
patent: 4581738 (1986-04-01), Miller et al.
patent: 5012435 (1991-04-01), Bailey et al.
patent: 5467358 (1995-11-01), Scarra
patent: 5555423 (1996-09-01), Grochowski et al.
patent: 5668817 (1997-09-01), Adham
patent: 6941489 (2005-09-01), DeLano

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