Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1995-05-05
1997-09-16
Bowers, Jr., Charles L.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438660, 438688, H01L 2144
Patent
active
056680554
ABSTRACT:
A process and resulting structure are described for using a metal layer formed over an insulating layer as both the filler material to fill openings in the insulating layer and as the patterned metal interconnect or wiring harness on the surface of the insulating layer. The process includes the steps of forming a compressively stressed metal layer over an insulating layer having previously formed openings therethrough to the material under the insulating layer; forming a high tensile strength cap layer of material over the compressively stressed metal layer; and then heating the structure to a temperature sufficient to cause the compressively stressed metal layer to extrude down into the openings in the underlying insulating layer. The overlying cap layer has sufficient tensile strength to prevent or inhibit the compressive stressed metal layer from extruding upwardly to form hillocks which would need to be removed, i.e., by planarization. The temperature to which the compressively stressed metal layer is subsequently heated to cause it to extrude should be less than the melting point of the compressively stressed metal layer.
REFERENCES:
patent: 4587138 (1986-05-01), Yau et al.
patent: 5288664 (1994-02-01), Mukai
patent: 5409862 (1995-04-01), Wada et al.
patent: 5427982 (1995-06-01), Jun
Aranovich Julio
Kieu Hoa
Xu Zheng
Yao Tse-Yong
Applied Materials Inc.
Bowers Jr. Charles L.
Gurley Lynne A.
Taylor John P.
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