Method of making a semiconductor device having high density 4T S

Details Method of making a semiconductor device having high density 4T S Method of making a semiconductor device having high density 4T S

1996-05-28

1998-02-17

Tsai, Jey

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438241, 148DIG19, 148DIG20, H01L 218244

Patent

active

057190798

ABSTRACT:
A method of forming a local interconnect in an SRAM, simultaneously with the formation of a salicide in logic devices on the same semiconductor substrate, is described. A semiconductor substrate on which MOS (Metal Oxide Semiconductor) transistors have been formed is provided. The transistors are separated by field isolation regions, and each transistor has a gate overlying a gate oxide and has source and drain regions in the substrate. Spacers are provided on the sidewalls of the gates, and some of the field oxide regions in the SRAM have polysilicon interconnects, with sidewall spacers. The sidewall spacers are removed from the polysilicon interconnects. A layer of titanium is deposited over the semiconductor substrate. A salicide is formed over the gates, the source and drain regions, and the polysilicon interconnects, so that the local interconnect is formed connecting the polysilicon interconnects to one of the source regions.

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S. Wolf, "Silicon Processing for the VLSI Era--vol. 2" Lattice Press, Sunset Beach, CA, pp. 571-572, 1990.

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