Method to reduce diode capacitance of short-channel MOSFETS

Details Method to reduce diode capacitance of short-channel MOSFETS Method to reduce diode capacitance of short-channel MOSFETS

1998-06-01

2000-03-14

Whitehead, Jr., Carl

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438290, 438299, 438301, 438305, 438307, H01L 21336

Patent

active

060372303

ABSTRACT:
A method of fabricating a semiconductor device and the device. There is provided a substrate (21) of semiconductor material. A gate electrode (25) is formed over the substrate (21) having a sidewall (27) and electrically isolated from the substrate. Source/drain regions (29, 31) are formed in the substrate defining a channel in the substrate extending beneath the gate electrode. One of a pocket region or a halo region (33) extending substantially entirely under the gate electrode and sidewall is then formed. The pocket region or halo region is formed by providing a compensating species which is implanted at the time of the source/drain implant in order to compensate the doping increase under the source/drain caused by the pocket or halo implant. Since the implant dose and range of this compensating implant is comparable to the pocket or halo implant, no penetration of the gate electrode should occur. Also, since the compensating implant is performed after the sidewall spacer is formed, the pocket or halo is not compensated in the region wherein it is required for reduction of MOS transistor short channel effects.

REFERENCES:
patent: 5328862 (1994-07-01), Goo
patent: 5416033 (1995-05-01), Lee et al.
patent: 5504023 (1996-04-01), Hong
patent: 5736446 (1998-04-01), Wu
patent: 5793088 (1998-08-01), Choi et al.

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