4. Excavating

Srinivas Patil

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Device, system, and method for optimized concurrent error...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate

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Flexible scan architecture

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Linear feedback shift register reseeding

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Method and apparatus for creating testable circuit designs...

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation
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Method and system for testing self-timed circuitry

Excavating
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Profile ID: LFUS-PAI-P-632513

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