4. Static information storage and retrieval
  5. Read/write circuit
  6. Having particular data buffer or latch

Shigeru Atsumi

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2-cell/1-bit type EPROM

Static information storage and retrieval – Read/write circuit – Including level shift or pull-up circuit
Patent

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Address detector of a redundancy memory cell

Static information storage and retrieval – Addressing – Including particular address buffer or latch circuit...
Patent

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Boosted voltage generating circuit and semiconductor memory...

Static information storage and retrieval – Powering
Reexamination Certificate

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Boosted voltage generating circuit and semiconductor memory...

Static information storage and retrieval – Powering
Reexamination Certificate

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Boosted voltage generating circuit and semiconductor memory...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate

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Profile ID: LFUS-PAI-P-66948

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